BiCMOS technology combines bipolar and CMOS technologies in integrated form to provide advantages over circuit implementations using only bipolar or CMOS technology. Circuits have been constructed which combine the best features of each technology, namely the high speed associated with bipolar devices and a low power consumption associated with CMOS devices. BiCMOS technology is preferred over CMOS technology in that it provides small signal handling capacity, it is less sensitive to process fluctuation and can provide mixed analog and digital functions in the same integrated circuit. BiCMOS technology is preferred over bipolar technology because it offers the possibility of higher density circuits with lower power consumption than is typically found in bipolar circuits.
As with all integrated circuits, there is a continuing emphasis on decreasing the feature sizes to increase the density of circuits which can be implemented on a silicon substrate of a given size. There is also a continuing emphasis on simplifying the processing sequence needed to form BiCMOS circuits in order to increase the yield and reduce the cost of such circuits. It is recognized that there is a need to bring the process sequence for forming bipolar devices in the BiCmos technology into a close correspondence with the basic CMOS process and to reduce the minimum feature size of the bipolar devices as close as possible to those produced in the CMOS process. In particular, it becomes increasingly difficult to reduce the feature sizes of the bipolar transistors while at the same time maintaining the alignment tolerance compatible with the alignment tolerances offered by the CMOS circuitry as the device features are reduced below 1 micrometer (.mu.m) and as they approach the 0.5 .mu.m.